Location: Shaffer 3
Time: 11:00 am
Execution performance of both commercial and scientific applications is critically determined by how efficiently the memory hierarchy can be utilized. Although modern computer systems provide many caches at different levels of the memory hierarchy, locality exploitation is not guaranteed. In this talk, I will give an overview of a large project on software and hardware support for effective locality-aware high performance computing. I will present three selective research topics: (1) cache optimization techniques at the application software level. (2) microarchitecture design for exploiting row buffer locality in DRAM, and (3) an efficient page replacement algorithm for buffer cache and its system software implementation. Through these case studies, I will discuss merits and limits of locality-aware techniques at different system levels.
Xiaodong Zhang is the Program Director of Advanced Computational Research at the National Science Foundation. His home institution is the College of William and Mary wherehe is a Professor of Computer Science. He has served on the editorial board of IEEE Transactions on Parallel and Distributed Systems, and is an associate editor of IEEE Micro. His research interests are in the area of high performance and distributed computing and systems, and computer architecture.